BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//Exida: Excellence. Independence. International Customer Base.//NO
 NSGML kigkonsult.se iCalcreator 2.30.10//
CALSCALE:GREGORIAN
METHOD:PUBLISH
UID:9cc9ea64-f097-4799-8380-83fcc821b985
X-WR-CALNAME:iCagenda
X-WR-CALDESC:Event Management Extension for Joomla!
X-WR-RELCALID:3E26604A-50F4-4449-8B3E-E4F4932D05B5
X-WR-TIMEZONE:Europe/Rome
BEGIN:VTIMEZONE
TZID:Europe/Rome
BEGIN:STANDARD
TZNAME:CET
DTSTART:20221030T030000
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
RDATE:20231029T030000
RDATE:20241027T030000
END:STANDARD
BEGIN:DAYLIGHT
TZNAME:CEST
DTSTART:20230326T020000
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
RDATE:20240331T020000
END:DAYLIGHT
END:VTIMEZONE
BEGIN:VEVENT
UID:36da7107-bc5d-4ac2-8ef4-0f62e548e100
DTSTAMP:20260413T192300Z
CATEGORIES:Automotive
CLASS:PUBLIC
DESCRIPTION;ALTREP="CID:<FFFF__=0ABBE548DFE235B58f9e8a93d@coffeebean.com>":
 \n\n\n\n\n\nSemiconductor IC and IP Development according to ISO 26262\n 
 \n\n\nCourse Topics:\n\n4-day training on ISO 26262 compliant system and h
 ardware development\, with focus on the specifics for the semiconductor in
 dustry\nAddressing requirements\, challenges and methods for functional sa
 fety management throughout all phases of the safety life cycle\nIntroducin
 g ISO 26262 item definition\, concept phase and system development to prov
 ide an overview understanding of how requirements for safety related ICs a
 nd IPs are derived by OEMs and Tier1 suppliers\nDetailing the specificatio
 n of safety requirements and safety concepts\nAddressing hardware developm
 ent requirements and quantitative analyses necessary to show compliance wi
 th the target metrics.\nComparing ISO 26262 process requirements against s
 tate-of-the-art automotive semiconductor development processes\, and deriv
 ing the required adjustments and method for ISO 26262 compliance\n\n For m
 ore details about the course topics\, download the brochure on the top of 
 the page\n\n\n\n\n\n\n\n\n\n Duration:     4 days\n\n\n\n \nSchedule:    1
 st day 09.00 - 18.00\; 2nd day 9.00 - 18.00\; 3rd day 9.00 - 18.00\; 4th d
 ay 9.00 - 18.00\;\nLanguage:   English or German in agreement with the par
 ticipants. The training material will be in English.\nLocation:    ONSITE 
 at our training rooms to exida.com GmbH office\, Prof. - Messerschmitt-Str
 aße 1 - D-85579\, Neubiberg / Germany or ONLINE\nCertificate:   Each parti
 cipant gets a letter of attendance.\n                      At the end of t
 he 4th day there is a possibility to do the FSP exam. This test is optiona
 l and free of charge.\n\n \n\n\n\n\n\n\n\n\n\n
DTSTART:20230612T080000Z
DTEND:20230615T160000Z
GEO:+48.0755;+11.656484
LOCATION:Prof.-Messerschmitt-Straße 1  D-85579 Neubiberg / Germany
ORGANIZER;CN=:kerstin.tietel@exida.com
SEQUENCE:1
SUMMARY:Semiconductor IC and IP Development (DE0208)
TRANSP:OPAQUE
URL:https://www.exida-eu.com/all-trainings/64-semiconductor-de0208-2
END:VEVENT
END:VCALENDAR
